The development of the behavior model and the synthesis of the MALT-Cv2 processor have been completed




The development of the second-generation MALT-C (working name: MALT-Cv2) behavior model has been completed, the processor has been successfully synthesized, using 28 nm TSMC technology. The project has been transferred to the stage of topology development. The pilot batch of the MALT-Cv2 processor manufacturing under MPW (Multi-Project Wafer) is scheduled for the second quarter of 2019.


The low power consumption and high performance on target tasks will enable to use the MALT-Cv2 as efficient replacement of contemporary CPUs or GPUs either in data centers where high performance is needed, or in embedded systems where low power consumption is essential. The MALT-Cv2 processor has 20 general-purpose RISC cores and 480 specialized processor elements integrated into 15 SIMD clusters, 32 elements each.