About project


The Project Objective


The aim of the project is to create specialized energy-efficient multithreaded processors in silicon that would surpass customized high-end FPGA systems in terms of the significantly higher performance-per-dollar value and to offer the processors to users worldwide. Also, the developed processors are easier to program in comparison to the universal x86/GPU/ARM computer systems and they show the performance-per-watt of a much higher order.




Is our aim achievable? Will the chips be in high demand? We suppose they will! For this purpose our processors have to satisfy the whole range of criteria, the most significant of which are energy efficiency, technological effectiveness, specialization, engineering ‘from scratch’, multicore and convenience of programming. Let us explain the criteria:


Energy efficiency. The productivity is not the most considerable requirement anymore. Nowadays the allocated power is the main factor limiting the chips productivity, therefore the productivity and energy efficiency increase almost concurrently.


Technological effectiveness. Currently the structure of function blocks and chips must be defined by the energy efficiency of the relevant topological solution, not by its appearance or the mapping simplicity of programming entities. Technology and the semiconductor’s electrophysical characteristics determine the microarchitecture.


Specialization is supposed to be the main reserve for the increase of productivity. In a single given algorithm, the universal processor loses an order of magnitude in productivity to a specialized solution, the specialized processor loses to FPGA, FPGA loses to a custom chip by one or two orders of magnitude.


Engineering ‘from scratch’.All the advanced programmable architectures consist of plenty rudiments remaining from the former ones in order to provide end-to-end compatibility. To get away from this legacy, we assume that every specialized block must be produced ‘from scratch’ for specific class of tasks with purpose of being energy-efficient to the limit.


Manycore. With the increasing number of transistors and the complexity of technological processes the leakage current grows in the transistor, as a result, the energy consumption is higher than expected. Those impacts are perceptible on technological processes below 90 nm, they must be taken into account using 28 nm and more modern chip technology. In the present-day world, when the major part of a chip is ‘dark’ there is a possible arrangement of a wide variety of special computing blocks, each of them is 100-1000 times more energy-efficient at their operations than ALU of a classic general-purpose processor. Thus, we decide in favor of scalar, vector or combined architecture of multicore processor.


Programming. is a vulnerable area of all the specialized processors, because the users are very reluctant to switch to a new language, to learn a new architecture and to stop using the common libraries, so in spite of the internal device the processor is supposed to maintain С/С++ and standard libraries or their decent subset.




In order to achieve the goal and to come up with a solution satisfying the requirements listed above, we reconsidered the concept of the multicore processor. The ‘Main ideas’ section contains the information about the approaches and the software, technical and organizational solutions which formed the basis of the project. All the chips we develop have hundreds to several thousands extremely compact processor cores with concurrent access to the shared resource data on the controller level and with hardware and software mechanism of thread planning and execution. The development name is MALT (Manycore Architecture with Lightweight Threads), which precisely captures the project essence. Get the MALT flowchart, explaining the processor design, in the ‘Architecture’ section.




Being realists, we don’t try to create a perfect universal processor. We intentionally limit the field of use of the MALT processor in order to achieve excellent results for the tasks they were made for, such as:

- Blockchain and cryptocurrency. MALT-C is a universal processor for complex crypto conversions, including blockchain transactions with utmost energy efficiency.

- Big data. MALT-D is a processor for simultaneous operations with a big data set stored in random-access or external memory. MALT-D represents complex processing logic.

- Mathematical physics. MALT-F is a processor for mathematical physics tasks, requiring irregular memory access. It features energy-efficient solutions.

Get more information about the chips we develop in the ‘MALT processors’ section and about the usage examples the ‘Applications’ section.




We realize the difficulties programmers face switching the architecture so we made sure MALT programming complexity was on a par with universal multicore processors. The user can choose C/C++, OpenCL or MALTCС regardless of their preferences and requirements concerning the application code optimization. Get more information in the ‘Programming’ section.



Project progress


The project has been constantly developing. Since 2011 we’ve created a 10-core prototype, then a 49-core prototype and, finally, a 210-core prototype using FPGA system. In 2015 we added vector coprocessor of our own architecture. In 2016, the first MALT-C was designedand then, in 2017 it was manufactured by TSMC (Taiwan Semiconductor Manufacturing Company) using 28 nm technology. We create complete programmable solutions and develop not only the chips but all the necessary software infrastructure. Get more information in the ‘Project process’ section.