MALT-C 21Mb480PLVDDR microprocessor synthesis using 28 nanometer TSMC technology




The development of the MALT 21Mb480PLVDDR processor netlist using 28 nanometer HPC+ (high-performance computing) TSMC technology has been completed. The area of the chip is 36 mm2. The project has been transferred to the stage of topology development. The pilot batch manufacturing under MPW (Multi-Project Wafer) is scheduled for the second quarter of 2019. The power consumption for stream encryption tasks enables to provide significantly higher power efficiency of calculations than contemporary CPUs or GPUs can offer. The throughput of 21Mb480PLVDDR processor on GOST R 34.12-2015 (“Kuznechik”) encryption algorithm will be around 30 Gbit/s. 21Mb480PLVDDR processor has 21 general-purpose RISC cores and 480 specialized processor elements integrated into 15 SIMD clusters, 32 elements each.