On January 23, the physical faculty of Lomonosov Moscow State University along with Mentor, a Siemens Business company has held a seminar on the topic of “VLSI design by Mentor CAD facilities”. Sergey Elizarov, the MALT project leader, has made a welcoming speech.
The development of the second-generation MALT-C (working name: MALT-Cv2) behavior model has been completed, the processor has been successfully synthesized, using 28 nm TSMC technology.
The MALT project has participated in international exhibition “Electronica-2018” that took place in Munich (Germany) from 13 to 16 November 2018. “Electronica-2018” has gathered manufacturers, designers, distributors and customers from various countries at one place and has been recognized as the world’s largest event in the field of electronic components, systems and electronics industry applications.
At the beginning of October 2018, an international forum “Microelectronica 2018” has taken place in Alushta (Crimea). We’ve taken an active part at the meeting, Sergey Elizarov, the MALT project leader, has made a presentation on the topic “Multicore computing system testing based on RSA algorithm ideas”.
From 13 to 16 November 2018 MALT project will participate in international exhibition of electronic components, systems and electronics applications “Electronica-2018” that will take place in Munich (Germany).
SDK v1.5 released
Software development kit 1.4 for MALT environment contains a great number of modifications and improvements added to simplify developer’s work with the system.
The 21th International exhibition of electronic components, modules and parts ‘Expoelectronica’ was held at Crocus Expo (Moscow) from 17 to 19 April 2018 simultaneously with the 16th International exhibition of Technology, equipment and materials for manufacturing devices of electronics and electrotechnical industries ‘ElectronTechExpo’.
OpenCL support has been added to MALT software development kit v1.3, right now it's in test mode. Coprocessor software, required by MALT-C processor family, is a separate software module now and may be installed over MALT basic software development kit, that supports general-purpose processor cores. In the current version of the kit demo examples are separated from test scripts and located in ‘../src/sw/examples’ folder. ‘Malt_start_thr’ function, enabling to start threads with parameter transfer on slave-cores, has been implemented in Libmalt library. The support for emulated processor type selection has been added to the make scripts. When ‘MALT_SIMD=...’ variable is set, MALTemu emulator loads the corresponding dynamic library.
MALTsystem project is to be presented at “ExpoElectronica 2018” within the stand organized by our partner LLC “CEP Lomonosov Moscow State University”. We invite you to visit D207 stand. “ExpoElecrtronica” is one of the most popular exhibitions in Russia in the field of electronic components, modules and parts.
The build program support for MALT-C 9Mb96G test chip has been added to current debugging set. Declare ‘TASIC=1’ environment variable during installation to enable compatibility mode. ‘Rm_mod’ and ‘locked’ parameters have been added to Maltemu 1.2 in ‘WriteFill’, ‘ReadModify’ functions. The support for operations with variable-length interconnect buffer has been added. Procedures of calculating the maximum allowed parallelism during required package installation have been implemented in Linux OS and FreeBSD. ‘–Hw-trace’ option, enabling to monitor function calls, has been added to MALTCC frontend.
Our article about full unit operation and technical limitations in blockchain systems, written within the research concerning our processor applicability in the field of cryptocurrency, has been published on habrahabr.ru. The article is available here.
The installer is modular now! Programmer tools 'malt-tool' and 'malt_sw' system are downloaded individually. Installation directory may be changed by ‘MALT_HOME’ environment variable. By default, ‘malt-tools’ is installed to ‘/opt/MALT’ directory, ‘malt_sw’ - to ‘$HOME/MALT’. GNU development tools have been upgraded to latest versions, including gcc - up to 7.2.0 version. Manycore processor support has been added to MALTemu emulator. Thus, the performance of the emulator is almost in proportion to the number of processor cores per host system. The support for any number of arbitrary size {scalar|array} arguments has been added to MALTCC for both SIMD and slave functions.
Qualcomm company has released 48-core server processor. The processor is developed by using 10 nm Samsung technology which enables to place on 400 mm2 area not only 48 cores but sufficiently large amount of cache memory. Qualcomm processor doesn’t lose to the latest generation of Intel Xeon processors by its characteristics and even surpasses them by some parameters...
Graphcore company has announced the creation of a new type of processors for machine learning and graph operations. They named the design IPU - Intelligence Processing Unit. According to the information from the company’s site, the device is designed for massive parallel computing using numbers with low-precision (perhaps, half-precision) floating point. It is promised, that the processor will have a much higher density of computing elements than already existing solutions in this field.
Samples of MALT-Cv1 processor have been received from TSMC foundry (Taiwan). MALT-Cv1 is the first chip belonging to MALT-C family which has been manufactured in silicon using 28 nanometer TSMC HPCPlus (high-performance computing) technological process. The processor contains 9 general-purpose RISC cores and 96 specialized processor elements integrated in 3 SIMD clusters, 32 elements each. MALT-Cv1 samples have been successfully passed entry tests on test vectors on “FORMULA” chip tester and estimated characteristics have matched with achieved characteristics under full load. Thus, full power consumption at operating frequency of 800 MHz was 1 W.
NEC company is going to release a vector accelerator after a long break. The device named NEC SX-Aurora TSUBASA will be manufactured using 16 nm FinFET technological process. This will be the first processor in the world equipped by six HBM2 memory modules which have been manufactured using CoWoS (Chip-on-Wafer-on-Substrate) technology.
Cisco company has presented a new specialized processor with two chips: one of them has 672 processors, 4 threads each + 44 MB SRAM + 520 SERDES with 6.5 Tb/s combined bandwidth, another one has multi-channel DRAM memory with its own controller: 1 billion random accesses per second and 37.5 GB/s during sequential read.
On October 12 the International Blockchain Forum has taken place in Moscow. Significant part of the presentations has been devoted to ICO and other financial and legal aspects of cryptocurrency. Still, there have been some interesting topics for computer engineering specialists to discuss.
On September 2017, there has been held a meeting of the MALT team with Prasad Saggurti - the director of development department (memory, logic libraries and memory test design) of Synopsys company.
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